A non-volatile semiconductor memory provides permanence for stored digital values by retaining any stored digital values when electrical power to the memory is interrupted. Non-volatile semiconductor memory has been integrated with circuitry in linear (i.e. analog) and digital products to store digital values, such as trim values in precision linear circuits, preferred logic configurations, micro-code, or product identification codes.
Two common types of non-volatile semiconductor memories are electrically programmable read-only memories (EPROMs) and electrically erasable programmable read-only memories (EEPROMs). These memories typically include an array of hundred of thousands or millions of non-volatile memory cells.
Complex ancillary circuitry is typically required to program, erase, and read a binary value in a memory cell within an array of memory cells. Ancillary transistor circuitry controls access to the memory cells so that only one memory cell can be selected at a time for programming or reading of a logic value. The ancillary transistor circuitry also supplies voltage levels to the selected memory cell that are different from the voltage levels that are supplied to other memory cells, in order to program, erase, or read a binary value of the selected memory cell.
The requirement for ancillary circuitry can make integration of the non-volatile memory into linear and digital products prohibitively expensive and time consuming, especially when small quantities of non-volatile memory are desired. The ancillary circuitry occupies space on the semiconductor substrate and, thereby, decreases the space available for other linear or digital circuitry. The ancillary circuitry further decreases the reliability of the product over any decrease due to the integrated memory elements.
Since each memory cell in the memory array must be separately selected before the binary value in the memory cell can be read, the binary value in each memory cell is not immediately output as a logical signal to any integrated circuitry in the product upon power-up of the non-volatile semiconductor memory.
It is with respect to this and other background information that the present invention has evolved.